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NXP Semiconductors
6.2 Pin description
LPC11C12/C14
Table 3.
LPC11C14 pin description table (LQFP48 package)
Symbol
PIO0_0 to PIO0_11
Pin
Type
I/O
Description
Port 0 — Port 0 is a 12-bit I/O port with individual direction and function
controls for each bit. The operation of port 0 pins depends on the function
selected through the IOCONFIG register block.
RESET/PIO0_0
3 [1]
I
RESET — External reset input: A LOW on this pin resets the device,
causing I/O ports and peripherals to take on their default states, and
processor execution to begin at address 0.
I/O
PIO0_0 — General purpose digital input/output pin.
PIO0_1/CLKOUT/
CT32B0_MAT2
4 [2]
I/O
PIO0_1 — General purpose digital input/output pin. A LOW level on this pin
during reset starts the flash ISP command handler via UART (if PIO0_3 is
HIGH) or via C_CAN (if PIO0_3 is LOW).
O
O
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3
10 [2]
14 [2]
I/O
O
I
I/O
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave Select for SPI0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin. This pin is monitored
during reset: Together with a LOW level on pin PIO0_1, a LOW level starts
the flash ISP command handler via C_CAN and a HIGH level starts the
flash ISP command handler via UART.
PIO0_4/SCL
15 [3]
I/O
I/O
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I 2 C-bus, open-drain clock input/output. High-current sink only if I 2 C
Fast-mode Plus is selected in the I/O configuration register.
PIO0_5/SDA
16 [3]
I/O
I/O
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I 2 C-bus, open-drain data input/output. High-current sink only if I 2 C
Fast-mode Plus is selected in the I/O configuration register.
PIO0_6/SCK0
PIO0_7/CTS
22 [2]
23 [2]
I/O
I/O
I/O
PIO0_6 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
PIO0_7 — General purpose digital input/output pin (high-current output
driver).
I
CTS — Clear To Send input for UART.
PIO0_8/MISO0/
CT16B0_MAT0
PIO0_9/MOSI0/
CT16B0_MAT1
SWCLK/PIO0_10/
SCK0/CT16B0_MAT2
LPC11C12_C14_0
Preliminary data sheet
27 [2]
28 [2]
29 [2]
I/O
I/O
O
I/O
I/O
O
I
I/O
I/O
O
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SPI0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9 — General purpose digital input/output pin.
MOSI0 — Master Out Slave In for SPI0.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWCLK — Serial wire clock.
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
All information provided in this document is subject to legal disclaimers.
Rev. 00.05 — 23 April 2010
? NXP B.V. 2010. All rights reserved.
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